1. Field of the Invention:
This invention relates to semiconductor packaging technology, and more particularly, to a method for breaking integrally-connected electrically-conductive traces on a circuited substrate used in TFBGA (Thin and Fine Ball Grid Array) semiconductor packaging technology into open-circuited state, for the purpose of facilitating the implementation of open-circuited testing on the electrically-conductivetraces mounted on the substrate.
2. Description of Related Art:
BGA (Ball Grid Array) is an advanced type of semiconductor packaging technology which is characterized in the mounting of a two-dimensional array of solder balls on the bottom surface of the substrate on which a semiconductor chip is mounted. These solder balls allow the entire package body to be mechanically bonded and electrically coupled to an external printed circuit board (PCB).
TFBGA (Thin and Fine Ball Grid Array) is a downsized type of BGA technology that provides semiconductor device packages in very small sizes, which are customarily fabricated in batch from a single chip carrier, such as a substrate, predefined with a matrix of package sites, from which an individual TFBGA package unit is obtained by singulating each package site. The TFBGA substrate is formed with a plurality of electrically-conductive traces which are used for electrically connecting the semiconductor chip on the substrate to external printed circuit board.
By the present TFBGA fabrication technology, since it is required to plate gold onto the electrically-conductive traces on the substrate, they are all integrally connected to a common plating bar, so that during plating process, electricity can be applied through the plating bar to all the electrically-conductive traces.
FIG. 1 shows a conventional circuit layout on a TFBGA substrate 10. As shown, this substrate 10 is partitioned into a plurality of package sites 11 which are separated from each other by crosswise and lengthwise intercrossed plating bars 20 (these plating bars 20 will be entirely cut away and discarded in the final step of the fabrication). Each package site 11 is used for the mounting of at least one semiconductor chip 30 thereon, so that each package site 11 can be singulated as an individual package unit in the final step. The semiconductor chip 30 is electrically connected to a plurality of electrically-conductive traces 40 formed over each package site 11 of the substrate 10.
Since it is required to perform a gold-plating process on the electrically-conductive traces 40, all the respective terminals 40a of the electrically-conductive traces 40 are connected by design to the plating bar 20, so that during plating process, electricity can be applied through the plating bar 20 to all the electrically-conductive traces 40.
When the semiconductor chip 20 is prior to mounted in position on the substrate 10, it is required to perform a short-circuited testing procedure and an open-circuited testing procedure for the purpose of checking whether the electrically-conductive traces 40 of the substrate 10 operates properly.
During the short-circuited testing procedure, the electrically-conductive traces 40 should be short-circuited to each others whereas, during the open-circuited testing procedure, they should be open-circuited from each other.
Since the respective terminals 40a of the electrically-conductive traces 40 are all originally connected to the plating bar 20, the electrical-conductive traces 40 are effectively short-circuited to each other; and therefore, they are readily set for the short-circuited testing procedure.
However, during the open-circuit testing procedure, it is required to break the electrically-conductive traces 40 apart from the plating bar 20 so as to make the electrically-conductive traces 40 open-circuited.
A feasible method for breaking the integrally-connected electrically-conductive traces 40 apart from the plating bar 20 is to use etchant to etch away the junction part between each plating bar 20 and each electrically-conductive trace 40, so as to make each electrically-conductive trace 40 open-circuited at its terminal 40a. 
The foregoing solution, however, has the following drawbacks. Firstly, the involved etching process would undesirably make the overall fabrication process more complex and costly to implement, and also undesirably increase the cycle time of the overall fabrication process. Secondly, the use of etchant would easily cause contamination to the substrate surface, which may degrade the performance and reliability of the circuitry formed over the substrate.
It is therefore an objective of the present invention to provide a method for breaking electrically-conductive traces on substrate into open-circuited state, which can be implemented without having to use etchant, so that the overall TFBGA fabrication can be simplified and thus cost-effective to implement.
It is another objective of the present invention that the proposed method would not cause contamination to substrate surface.
It is still another objective of the present invention that the proposed method can be implemented without increasing the overall cycle time of the fabrication process.
In accordance with the foregoing and other objectives, the invention proposes a new method for breaking electrically-conductive traces on substrate into open-circuited state.
The method of the invention comprises the following steps: (1) forming a resistively-enlarged point at the terminal of each of the electrically-conductive traces, the resistively-enlarged point being higher in electrical resistance than each of the electrically-conductive traces; and (2) applying an electrical current to pass through each of the electrically-conductive traces, the electrical current being adequate enough in magnitude to melt the resistively enlarged point while leaving each of the electrically-conductive traces intact, thereby making each of the electrically-conductive traces open-circuited.
The resistively-enlarged point can be realized either by constricting the terminal of each electrically-conductive trace, or by coating an electrically-resistive material onto the terminal of each electrically-conductive trace.
The method of the invention allows the electrically-conductive traces on the substrate to be made open-circuited simply by applying an adequate electrical current to pass through the electrically-conductive traces, which is easy to carry out without using expensive equipment, making the overall fabrication process more cost-effective to implement then the prior art. Moreover, the method of the invention will substantially cause no contamination to the substrate surface as in the case of the prior art.